From: Chuck Munro (chuckm@canada.hp.com)
Date: 08/05/93


From: chuckm@canada.hp.com (Chuck Munro)
Subject: Re: Are any SIMMs cheap these day$ ?
Date: Thu, 5 Aug 1993 22:57:08 GMT

Andreas Helke (andreas@fly.mgen.uni-heidelberg.de) wrote:
> Are you shure that you have 8 bit wide simms? There exist motherboards with
> 32 bit wide simms. On a standard motherboard the only way to go to 1 MB will
> be to use 4 256kb simms. A 8 bit wide memory interface is possible and is
> still used with 8 bit memory cards on the ISA bus. But on the mainboard
> this would require extra effort and severely degrade performance. Therefore
> I do not think that anybody has constructed a mainboard for 32bit processors
> with a 8 bit memory interface for on board ram. The Pentium cpu even has a
> 64 bit memory interface, but internally it is still a 32 bit processor.

Gee, methinks I have a lot to learn here!! Unfortunately for me, I have
been making some rash assumptions about how PC motherboards are built.
I guess if I were to do my homework right, I'd go read some design specs
and perhaps look up the specs for memory chips, etc.

I come from a background of 16-bit minis long before being exposed to PCs,
and my assumptions about smaller machines are somewhat off the mark :-)

Well, lessee now ... I look at my CPU's (skimpy) manual, and sure enough,
the memory data path *is* 32 bits wide, and if I read the memory config
guide properly this time, I see that I must put a SIMM in *each* socket
of a SIMM *bank*, not in a single socket. So that's 4 MBytes minimum
using 1 MByte SIMMs. Since this machine started its life with 16 MBytes,
the smaller configurations never crossed my mind.

I have been spoiled by using minis and workstations too much. By now
it's probably obvious that this is the first PC I have ever really
played with inside. If I had thought about this more carefully, I'd
have realized that four fetch cycles would have been needed with only
8 bits !! I also carefully checked the *entire* memory config chart,
rather than just the segment I was using, and saw that memory doesn't
increment in 1 MByte and 2 MByte steps, but in various step sizes
depending on the mix of 256K, 1M and 4M SIMMs.

So, I guess that there are never fewer than 4 parity bits involved in a
single memory-transfer cycle. I guess I'd still rather that my machine
at least stop executing on a parity error instead of giving a wrong
answer. I still prefer ECC, but it's sooooo expensive.

So, you're exactly right, Andreas! I think I'll go crawl under a table
now ... there's nothing like the thrill of screwing up on the net! :-)

Cheers,
A humbler Chuck.